/*
 * tcounters.c
 *
 * Created: 04/06/2018 13:51:49
 *  Author: Ledo
 */ 
#include "asf.h"
#include "globales.h"
//Prototipos
void tc0_0_init(void);
//void tc0_1_init(void);
//void tc1_0_init(void);
//void tc1_1_init(void);



//Timer/Counter 0 channel 0
void TC0_Handler(void)
{
	//Read TC Status (required to reset this interrupt)
	uint32_t status;
	status = TC0->TC_CHANNEL[0].TC_SR;
	//If compare match, update DAC with new music data
	if((status & TC_SR_CPCS) == TC_SR_CPCS)
	{
		Flags.sys_led_toogle = true;
	}
}

/*
//Timer/Counter 0 channel 1
ISR(TC1_Handler)
{
	//Read TC Status (required to reset this interrupt)
	uint32_t status;
	status = TC0->TC_CHANNEL[1].TC_SR;
	//If compare match, update DAC with new music data
	if((status & TC_SR_CPCS) == TC_SR_CPCS)
	{
		ioport_toggle_pin_level(SYS_LED);
		
	}
}


//Timer/Counter 1 channel 0
ISR(TC3_Handler)
{
	//Read TC Status (required to reset this interrupt)
	uint32_t status;
	status = TC1->TC_CHANNEL[0].TC_SR;
	//If compare match, update DAC with new music data
	if((status & TC_SR_CPCS) == TC_SR_CPCS)
	{
		ioport_toggle_pin_level(PIO_PA14_IDX);
		
	}
}

//Timer/Counter 1 channel 1
ISR(TC4_Handler)
{
	//Read TC Status (required to reset this interrupt)
	uint32_t status;
	status = TC1->TC_CHANNEL[1].TC_SR;
	//If compare match, update DAC with new music data
	if((status & TC_SR_CPCS) == TC_SR_CPCS)
	{
		ioport_toggle_pin_level(PIO_PA14_IDX);
		
	}
}

*/

void tc0_0_init(void)
{
	//Configure PMC, TC0,  and TC1
	PMC->PMC_PCER0 = (1 << ID_TC0) ;
	
	TC0->TC_CHANNEL[0].TC_CMR = TC_CMR_CPCTRG;
	TC0->TC_CHANNEL[0].TC_RC = 6000000;
	TC0->TC_CHANNEL[0].TC_IER = TC_IER_CPCS;
	
	//Configure TC0 interrupts
	NVIC_DisableIRQ(TC0_IRQn);
	NVIC_ClearPendingIRQ(TC0_IRQn);
	NVIC_SetPriority(TC0_IRQn, 1);
	NVIC_EnableIRQ(TC0_IRQn);
	
	// Start the TC0
	TC0->TC_CHANNEL[0].TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;;
}


/*
void tc0_1_init(void)
{
	//Configure PMC, TC0,  and TC1
	PMC->PMC_PCER0 = (1 << ID_TC1) ;
	
	TC0->TC_CHANNEL[1].TC_CMR = TC_CMR_CPCTRG;
	TC0->TC_CHANNEL[1].TC_RC = 12000000;
	TC0->TC_CHANNEL[1].TC_IER = TC_IER_CPCS;
	
	//Configure TC1 interrupts
	NVIC_DisableIRQ(TC1_IRQn);
	NVIC_ClearPendingIRQ(TC1_IRQn);
	NVIC_SetPriority(TC1_IRQn, 1);
	NVIC_EnableIRQ(TC1_IRQn);

	// Start the TC1
	TC0->TC_CHANNEL[1].TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;;
}
*/

/*


void tc1_0_init(void)
{
	//Configure PMC for TC3, TC4, and TC5
	PMC->PMC_PCER0 = 1 << ID_TC3;
	//Trigger on RC compare
	TC1->TC_CHANNEL[0].TC_CMR = TC_CMR_CPCTRG;
	TC1->TC_CHANNEL[0].TC_RC = 6000000;
	//Enable interrupt
	TC1->TC_CHANNEL[0].TC_IER = TC_IER_CPCS;
	//Configure TC1[0] which TC3
	NVIC_DisableIRQ(TC3_IRQn);
	NVIC_ClearPendingIRQ(TC3_IRQn);
	NVIC_SetPriority(TC3_IRQn, 1);
	NVIC_EnableIRQ(TC3_IRQn);

	// Start the TC3
	TC1->TC_CHANNEL[0].TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
}

void tc1_1_init(void)
{
	//Configure PMC for TC3, TC4, and TC5
	PMC->PMC_PCER0 = 1 << ID_TC4;
	//Trigger on RC compare
	TC1->TC_CHANNEL[1].TC_CMR = TC_CMR_CPCTRG;
	TC1->TC_CHANNEL[1].TC_RC = 6000000;
	//Enable interrupt
	TC1->TC_CHANNEL[1].TC_IER = TC_IER_CPCS;
	//Configure TC1[1] which TC4
	NVIC_DisableIRQ(TC4_IRQn);
	NVIC_ClearPendingIRQ(TC4_IRQn);
	NVIC_SetPriority(TC4_IRQn, 1);
	NVIC_EnableIRQ(TC4_IRQn);

	// Start the TC4
	TC1->TC_CHANNEL[1].TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
}

*/